In recent years, flat-panel display devices as typified by liquid crystal display devices have been in practical use, and mounted in a variety of types of electronic equipment, in particular mobile electronic equipment. Widely-used flat-panel liquid crystal display devices are thin liquid crystal display devices of active matrix type capable of high-resolution display.
FIG. 11 is a view schematically illustrating the structure of such a conventional active matrix liquid crystal display device. The active matrix liquid crystal display device is composed of two boards having a liquid crystal layer sandwiched there between, in which an element board 100, one of the two boards, has disposed thereon in the form of a lattice a plurality of unillustrated source bus lines and a plurality of unillustrated gate bus lines, which respectively act as video signal lines and scanning signal lines, and the board also has a plurality of pixel formation portions disposed in the form of a matrix, at their respective intersections between the source bus lines and the gate bus lines. The pixel formation portions constitute a display portion of the device, and each pixel formation portion includes a TFT (thin film transistor) and pixel electrodes, the TFT being a switching element having a gate terminal connected to the gate bus line, and a source terminal connected to the source bus line, the pixel electrodes being connected to a drain terminal of the TFT. The element board 100 including the pixel formation portions is also referred to as a “TFT board”. In addition, a counter board 200, the other of the two boards that is opposed to the element board 100, has a common electrode and a color filter (CF) provided thereon, the common electrode being an unillustrated counter electrode commonly provided for the pixel formation portions, the color filter being intended to form display colors. This board is also referred to as a “CF board”.
Such an active matrix liquid crystal display device includes: a source driver (column control circuit) 130 for driving the source bus lines of the display portion; a gate driver (row control circuit) 140 for driving the gate bus lines of the display portion; an unillustrated common electrode drive circuit for driving the common electrode; and an unillustrated display control circuit for controlling the source driver, the gate driver, and the common electrode drive circuit. In recent years, it is often the case that, of the above elements, at least the source driver 130 and the gate driver (column control circuit) 140 are each composed of polysilicon thin film transistors, and disposed in a frame region 120 on the element board 100, which is provided around a display region 110 in which the pixel formation portions are disposed. The configurations of the display region 110 and the frame region 120 will be described next with reference to FIGS. 12 and 13.
FIG. 12 is an enlarged top view illustrating a detailed configuration of a portion of the element board 100 that is included in the area encircled by circle A shown in FIG. 11. FIG. 12 shows two pixel formation portions 111a and 111b, which are provided in the display region 110 and have the same configuration, a dummy pixel portion 901, which is provided in the frame region 120 and has the same configuration as those of the pixel formation portions 111a and 111b, and a code notation portion 902 in which a code 21 and predetermined wiring are provided.
As shown in FIG. 12, the display region 110 has a plurality of gate bus lines 150, which are disposed along display rows at predetermined intervals in the vertical direction of the figure, and a plurality of source bus lines 160, which are disposed along display columns at predetermined intervals in the horizontal direction of the figure.
The gate bus line 150 is connected to gate terminals of thin film transistors, which are respectively included in the pixel formation portions 111a and 111b and the dummy pixel portion 901, while the source bus line 160 is connected to a source terminal of a corresponding one of the thin film transistors via a contact hole 12.
Note that the thin film transistor is formed by a semiconductor layer 11, and in this case, a gate electrode of the thin film transistor formed by the semiconductor layer 11 is divided into three portions as shown in FIG. 12. By dividing the gate electrode into a plurality of portions in such a manner, it becomes possible to reduce OFF-current in the transistor, and thereby to improve the ability to hold a written potential at a predetermined value.
In addition, a drain terminal of the thin film transistor extends out of a contact hole 13 toward a display surface of the element board 100 (a surface facing the counter board 200) before being connected via a through-hole 14 to a transparent electrode 16 and a reflective electrode 17, which serve as pixel electrodes. Such a layered structure will be described later.
Note that this display device is a so-called semi-transmissive display device, in which a display (herein after, referred to as a “transmissive display”) using transmissive light from an unillustrated backlight illumination device, which is positioned opposite to the counter board 200 with respect to the element board 100, is effected simultaneously with a display (herein after, referred to as a “reflective display”) using outside light incident from the outside of the device through the counter board 200. The semi-transmissive display device is capable of providing a readily-viewable display by effecting the transmissive display mainly in a dark place, whereas effecting the reflective display mainly in a bright place. Accordingly, the pixel electrodes as described include both the transparent electrodes 16 for the transmissive display and the reflective electrodes 17 for the reflective display, but the display device may include only pixel electrodes of either type.
A storage capacitance portion 15, which is also referred to as an “auxiliary capacitance”, is additionally provided to hold the potentials of the pixel electrodes. One of two electrodes included in the storage capacitance portion 15 (which is provided at the side opposite to the counter board 200) linearly extends as a storage capacitance line 170 out of the display region 110 and passes through the frame region 120 in the row direction.
A repair portion 18, which is composed of a pair of electrodes having a predetermined insulating layer sandwiched there between, is provided to repair any defect of the pixel formation portion that has occurred during manufacture. For example, if a predetermined potential from the source bus line 160 cannot be written onto the pixel electrode for such a reason that the thin film transistor in the pixel formation portion has been disconnected during manufacture, such a defective pixel formation portion is undesirable because it appears as a bright spot (in the case of a normally-white-type display device). Therefore, the pair of electrodes included in the repair portion 18 are fused together by irradiating them with laser or suchlike, making it possible to electrically connect the pixel electrode to the source bus line. As a result, the defective pixel formation portion that appears as a bright spot is turned into a black spot, making it possible to make the display defect less noticeable.
The dummy pixel portion 901 is identical in configuration and size to the pixel formation portions 111a and 111b, but it does not form a pixel (i.e., it is not used for effecting a display). In general, such dummy pixel portions are disposed in a position corresponding to a display row or column adjacent to the periphery of the display region 110. The dummy pixel portions prevent: (1) breakage of the pixel formation portions due to static charge; (2) lighting with uneven brightness due to different parasitic capacitances in the pixel formation portions provided in the vicinity of the periphery of the display region 110; and (3) an abrupt change of the cell gap (height) between the vicinity of the periphery of the display region 110 and the frame region 120. Note that, in some cases, to further enhance such advantages of the dummy pixel portions, two or more dummy pixel portions are disposed together in the vicinity of one end of a single display row (or display column).
Since the structure of the semiconductor layer 11 for forming the thin film transistors is well-known, any detailed description thereof will be omitted herein, but layered structures of the element board 100 including the semiconductor layer 11 will be briefly described with reference to FIGS. 13A through 13D.
FIGS. 13A through 13D are schematic views illustrating the pixel formation portions 111a and 111b, the dummy pixel portion 901, and the code notation portion 902 in cross section taken along line A-A shown in FIG. 12. More specifically, FIG. 13A is a view illustrating an example where the code 21 in the code notation portion 902 is formed by a reflective electrode, FIG. 13B is a view illustrating an example where the code 21 is formed by a source electrode, FIG. 13C is a view illustrating an example where the code 21 is formed by a gate electrode, and FIG. 13D is a view illustrating an example where the code 21 is formed by a semiconductor layer.
As shown in FIG. 12, the code 21 is the number “111” provided in the frame region 120, indicating a display-row or column number within the display region 110. This number is used for process management and analysis of the element board 100 or a liquid crystal cell.
Note that the code 21 is disposed so as to be viewable from the display surface side of the element board 100 (as shown in FIG. 12), or the code 21 may be disposed with the number being inverted, so that it is viewable through a glass substrate of the element board 100 from the side opposite to the display surface.
As shown in FIG. 13A, the code 21 can be made up of the same reflective electrode material as that for the reflective electrode 17 to increase visibility. However, light traveling toward the frame region 120 around the display region 110 might be blocked by a predetermined black matrix formed on the counter board 200, and therefore the same electrode material as that for the gate electrode, or the source electrode, which is a thin film made up of metal and having a light-blocking effect, is often used in order to ensure the visibility of the code 21, as well as to form the code 21 in an early stage.
Specifically, an unillustrated silicon thin film is first formed on a glass substrate 51 of the element board 100, and furthermore, after a gate insulating film 52 is formed thereon, gate electrodes and an inter layer insulating film 53 are formed. Thereafter, drain electrodes and source electrodes of thin film transistors are formed in contact holes that have been made to expose the silicon thin film. After a flattened layer 54 including a passivation film is further formed thereon, through-holes 14 and other holes are made. The transparent electrodes 16 made up of ITO (indium tin oxide) are formed above the holes, and the reflective electrodes 17 are then formed using a conductive material such as aluminum or silver. In the case of forming the code 21 using the reflective electrode, the formation is carried out in a rather late stage, and therefore the code 21 is often formed simultaneously with the source electrode as shown in FIG. 13B, or the gate electrode as shown in FIG. 13C, using the same material as that for the electrode. Furthermore, the code 21 may be formed simultaneously with the semiconductor layer 11, which is the aforementioned silicon thin film, as shown in FIG. 13D, using the same material as that for the semiconductor layer 11. Note that the silicon may be amorphous silicon.
Here, the code 21 can be made up of a thin-film material (e.g., a color filter) on the counter board 200, rather than on the element board 100. However, if the code is formed on the counter board 200 without considering the positions of various conductors and circuits that are to be formed on the element board 100, such conductors and circuits having a light blocking effect make it difficult to read the code on the counter board 200 through the glass substrate from the side opposite to the display surface of the element board 100. Also, in such a case, part or all of the code is often rendered impossible or hard to view even from the counter board 200 side. Therefore, it is preferable that the code 21 is disposed on the element board 100.
[Patent Document 1] Japanese Laid-Open Patent Publication No. 2004-163600
[Patent Document 2] Japanese Laid-Open Patent Publication No. 2000-292805